1. Technical Field
The present disclosure relates to channel aggregation (i.e., path-sharing) and to channel segmentation (i.e., path-partitioning) in radio circuits.
2. Background Information
Many future radio systems will likely include radio transmitters and/or receivers that communicate using multiple antennas, and communicate with a given antenna over multiple frequency carriers, and that for a given frequency carrier and antenna combination involve separate In-phase (I) and Quadrature phase (Q) signal paths. A straightforward way to implement such a receiver is to provide a separate hardware signal path for each permutation of antenna, frequency carrier, and I/Q signal. For example, in one possible implementation of the LTE-A (Long Term Evolution—Advanced) wireless communication standard an 8×8 MIMO (Multiple-Input and Multiple-Output) transceiver uses eight antennas for receiving. The receiver of the transceiver may receive on any one of four LTE carriers using any one antenna. Accordingly, thirty-two signal paths through the receiver may be provided. Moreover, each of these signal paths actually involves an I signal path and a Q signal path, so in total there may be sixty-four signal paths realized in hardware in the receiver. Providing this much hardware would be costly and would result in a large amount of power consumption. To avoid the power and cost of providing possibly redundant hardware, path-sharing techniques can be employed. In a path-sharing technique, multiple incoming signals received via multiple incoming signal paths are aggregated into a single signal. This single signal is then made to pass through a single hardware signal path and processing path as an aggregated stream. After processing, the aggregated stream is then de-aggregated to regenerate multiple signals where each signal is then made to continue through the system along its own signal path. Such aggregation and de-aggregation techniques can be practiced to different degrees depending on the application and performance requirements.
FIG. 1, FIG. 2 and FIG. 3 (Prior Art) are simplified diagrams of a cellular telephone handset 1. These diagrams illustrate a situation where utilizing path-sharing to reduce circuit cost would be desirable. Cellular telephone handset 1 involves, among other parts not illustrated here, two antennas 2 and 3, a RF (Radio Frequency) transceiver integrated circuit 4, and a digital baseband processor integrated circuit 5. A processor 6 on the digital baseband processor integrated circuit 5 executes programs of instructions stored in memory 7 and controls transceiver circuitry on the RF transceiver integrated circuit 4 by sending control information to the RF transceiver integrated circuit 4 via serial bus 8. Multiple outgoing signal paths extend from Digital-to-Analog Converters (DAC) 9-12 via inter-chip conductors 13-16 to transmitter circuitry on the RF transceiver integrated circuit 4. Multiple incoming signal paths extend from the RF transceiver integrated circuit 4 via inter-chip conductors 17-20 to Analog-to-Digital Converters (ADC) 21-24 on the digital baseband integrated circuit 5.
FIG. 2 (Prior Art) is a more detailed diagram of the transceiver circuitry in RF transceiver integrated circuit 4 and the multiple signal paths between the RF transceiver integrated circuit 4 and the baseband processor integrated circuit 5. There are two transmit chains 25 and 26 and there are two receive chains 27 and 28.
FIG. 3 (Prior Art) is a more detailed diagram of one of the receive chains 28. After the LNA (Low Noise Amplifier) 29 there are two signal paths involving a mixer and a baseband filter. A first signal path involves In-phase (I) mixer 30 and baseband filter 31. A second signal path involves Quadrature phase (Q) mixer 32 and baseband filter 33. Similarly, there are two separate paths from the RF transceiver integrated circuit to the digital baseband processor integrated circuit and to two separate ADCs 23 and 24. Because providing all this hardware is costly and consumes a large amount of power as described above, efforts may be made to use aggregation and de-aggregation techniques to share circuit paths. Furthermore, reducing the pin count (here from integrated circuit 4 to integrated circuit 5) by sharing circuit paths is also of great value for reducing the integrated circuit packaging cost as well as reducing printed circuit board area. Tzeng et al., “A CMOS Code-Modulated Path-Sharing Multi-Antenna Receiver Front-End”, IEEE Journal of Solid-State Circuits, Vol. 44, No. 5, pages 1321-1335 (May 2009) describes a path-sharing scheme whereby multiple blocks in a multi-antenna receiver can be shared. The code-modulated scheme described, however, would have undesirably limited performance and/or would be undesirably large and costly to implement in future high performance MIMO LTE-A applications. More advanced aggregation and de-aggregation structures and methods are sought that can be implemented in a smaller amount of integrated circuit area and can simultaneously provide superior performance and low power consumption.
It is also possible that the bandwidth of a single channel be larger than what a single DSADC can handle. For example, LTE-A may have a channel bandwidth of 100 MHz, while a current state-of-the-art DSADC can typically only handle 40 MHz signals efficiently. A simple solution is to treat the channel as three channels, with bandwidths of 40 MHz, 40 MHz, and 20 MHz each, and then to use three circuit paths (specifically including three LOs) to receive them. This approach, however, involves an undesirably large amount of circuit area and a large amount of power consumption. Therefore, more advanced channel segmentation and de-segmentation structures and methods are sought that can be implemented in a smaller amount of integrated circuit area and can simultaneously achieve low power consumption.